1. Field of the Invention
Aspects of the present invention relate to a computer system and a control method thereof and, more particularly, to a computer system having a dual-channel memory structure and a control method thereof.
2. Description of the Related Art
As shown in FIG. 1, a conventional computer system 10 includes a central processing unit (CPU) 11, a memory unit 12, a graphic processing unit 14, a North bridge 13, a display unit 15, a South bridge 16, and a peripheral device 17. The CPU 11 executes programs and performs various operations. The memory unit 12 stores the programs executed by the CPU 11 and the data processed by the CPU 11. The graphic processing unit 14 performs graphic processing operations. The display unit 15 displays images based on the data processed by the graphic processing unit 15. The North bridge 13 is a memory controller and reads/writes data from/to the memory unit 12. The South bridge 16 controls input/output of the peripheral device 17 and acts as an interface between the CPU 11 and the peripheral device 17. The memory unit 12 can be a random access memory (RAM). The graphic processing unit 14 can be a graphic card. The display unit 15 can be a monitor. The peripheral device 17 may include a hard disk drive (HDD), a read only memory (ROM), a network card, and/or a sound card.
Reducing power consumption has been a main issue in designing computer systems like the computer system 10. Since the CPU 11 consumes a lot of power, power consumption of the CPU 11 needs to be reduced in order to reduce overall power consumption of the computer system 10. Various techniques, such as reducing voltage or clock speed, have been used to reduce power consumption of the CPU 11. Techniques of reducing power consumption have been applied to a portable computer system (e.g., a notebook computer).
Power consumption of the display unit 15 can be reduced by adjusting the brightness of the screen in a low power mode. The South bridge 16 consumes little power compared to overall elements of the computer system 10 and virtually no power when the South bridge is inactive.
However, the memory unit 12 consumes a lot of power when reading/writing data since data flow most frequently occurs in the memory unit 12 in the computer system 10. In addition, the memory unit 12 performs a self-refresh operation to maintain information stored in the memory unit 12. The memory unit 12 thus consumes a considerable amount of power even when not reading/writing data.
Conventional computer systems like the computer system 10 commonly use a dual-channel memory bus (referred to as a “dual-channel memory” or a “dual-channel”) to improve memory performance. The memory unit 12 includes a first memory unit 12a and a second memory unit 12b. Two mutually independent 64-bit memory channels are provided in parallel in the dual-channel memory bus such that a 128-bit data bus can be realized. The two 64-bit memory channels are respectively referred to as the first memory unit 12a and the second memory unit 12b. The dual-channel memory bus improves system performance by about 20% to 30% compared to a single channel memory bus.
FIG. 2 is a block diagram of a power supplying configuration of a dual-channel structure of the conventional computer system 10. The computer system 10 further includes a memory power supply 19a to supply power to the first memory unit 12a and the second memory unit 12b. The computer system 10 further includes a first termination unit 18a and a second termination unit 18b to improve signal quality and a termination power supply 19b to supply power to the first and second termination unit 18a and 18b. 
However, in the conventional computer system 10, power is supplied in parallel to the first and second memory units 12a and 12b from the memory power supply 19a. Since the memory unit 12 is periodically refreshed even though only one of the first and second memory units 12a and 12b is used, the other memory not in use unnecessarily consumes power.